
From: Adam Kropelin <akropel1@rochester.rr.com>

PCI_ROM_ADDRESS is a 32 bit register and as such should be accessed using
pci_bus_{read,write}_config_dword().  A recent audit of drivers/ turned up
several cases of byte- and word-sized accesses.  The harmful ones were fixed
by Linus directly.  This patches up one of the remaining
harmless-but-still-wrong cases caught in the dragnet.

Signed-off-by: Adam Kropelin <akropel1@rochester.rr.com>
Cc: <kristen.c.accardi@intel.com>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---

 drivers/pci/hotplug/shpchp_ctrl.c |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)

diff -puN drivers/pci/hotplug/shpchp_ctrl.c~shpchp-use-dword-accessors-for-pci_rom_address drivers/pci/hotplug/shpchp_ctrl.c
--- devel/drivers/pci/hotplug/shpchp_ctrl.c~shpchp-use-dword-accessors-for-pci_rom_address	2005-09-14 01:20:47.000000000 -0700
+++ devel-akpm/drivers/pci/hotplug/shpchp_ctrl.c	2005-09-14 01:20:47.000000000 -0700
@@ -2824,8 +2824,7 @@ static int configure_new_function (struc
 		}
 #endif
 		/* Disable ROM base Address */
-		temp_word = 0x00L;
-		rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word);
+		rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00);
 
 		/* Set HP parameters (Cache Line Size, Latency Timer) */
 		rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
_
